An open standard interconnect designed for high-performance data center computers. It provides a high-speed, high-capacity connection between central processing units (CPUs) and accelerators, such as graphics processing units (GPUs) and field-programmable gate arrays (FPGAs). Built on the serial PCI Express (PCIe) physical and electrical interface, CXL includes protocols for block input/output (CXL.io), system memory access (CXL.cache), and device memory access (CXL.mem). This allows CXL memory to overcome performance and socket packaging limitations of common DIMM memory when implementing high storage capacities.
High-Speed Interconnect Technology
CXL enables efficient and scalable communication between the CPU and accelerators. This allows for more efficient use of processing resources and enables applications to take advantage of the specialized processing capabilities of accelerators.
Standardized and Open Technology
CXL is designed to be a standardized and open technology. This allows for interoperability between different hardware vendors, enabling data center administrators and users to leverage the best available processing resources and a common set of software tools and development environments.
Simplifying High-Performance Computing
By standardizing the interface between processors and accelerators, CXL helps to simplify the development and deployment of high-performance computing systems. This enables the creation of more efficient and scalable data center infrastructures.